3D NAND Flash is a type of flash memory which involves stacking memory cells on top of each other to provide a higher capacity/volume ratio in a smaller physical space. It maximizes electrical efficiency by shortening the interconnect length between cells. Samsung’s 3D V-NAND was the first ever manufactured 3D NAND flash memory chip. The vertically stacked cell layers make use of charge trap flash (CTF) technology which enables it to offer memory of upto 128 GB on a chip. It has twice the write performance, twice the scalability and ten times the reliability of 2D, or planar NAND, which consequently improves the performance and stability of laptops, smart phones and tablets. 3D NAND chips are also used in Solid State Drives (SSDs) as they possess the characteristic of retaining data without power supply. The manufacturing process of 3D NAND is less complicated than that of alternative technologies, like RRAM, since it requires the same materials used to produce NAND, while FRAM, MRAM and RRAM and others require new materials that are not well explored and understood. Additionally, they are incorporated in a wide range of consumer electronic products and enterprise applications.
Key smartphone manufacturers compete with each other primarily on the basis of high performance. The rapid influx of smartphones, tablets and notebooks in the market is expected to be the key driving force for this industry. Notebook manufacturers have started integrating this technology in some of the premium notebooks that they offer. Increased demand for data storage devices offering large storage spaces is expected to drive this market. Growing demand for high-performance computers used in programming, monitoring, gaming, and various critical areas is further expected to propel the growth of this market. Starting from the high-end enterprise market, the V-NAND technology is gradually expected to replace planar NAND market in phases. Some of the challenges involved in the manufacturing process of these chips are construction of vertically interconnected cell arrays, building tall multilayer structures and installing layers of uniform thickness across the entire wafer. Additionally, every layer in the device has to be surrounded by an insulating layer.
Industry participants include Micron Technology Inc, Samsung Electronics Co. Ltd., Intel Corp. Ltd., SK Hynix Inc., SanDisk and Toshiba Corp among others. Toshiba and SanDisk are planning to commence the creation of the 3D NAND by developing a new wafer fab facility. The 3D NAND chips are expected to be able to create embedded flash with enough capacity to store 1TB of data.
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